DeepLogcore is a soft AI IP compatible with a wide range of processes, particularly mature and power-saving low-cost processes between 28nm to 130nm. As a result, customers can control their manufacturing costs according to their specific needs and market demands.
Soft AI IP
DeepLogCore
Support RISC-V/ARM system soft AI IP design service
DeepMentor has developed an AI IP that combines low-power and high-performance features with the
RISC-V SOC. This integration allows customers to quickly create unique AI SOC without worrying
about software integration or system development issues. DeepLogCore
supports both RISC-V and ARM systems, enabling faster and more flexible development.
Supports DeepMentor Exclusive Low-distortion Training Models
DeepLogCore Key Use Cases On Premises
We provide the best 28~130nm AI IP for IC design companies to develop advanced AI products!
Support RISC-V/ARM
Our miniaturized operator architecture offers remarkable flexibility, enabling seamless integration of the latest AI features.
● High-bandwidth memory with AIM 3D stacking technology
● Supports 1 to 4 or more CPU cores with FPU and MMU capabilities
● High-bandwidth AXI4 fabric that allows all slaves to operate simultaneously
● Supports 1 to 4 or more CPU cores with FPU and MMU capabilities
● High-bandwidth AXI4 fabric that allows all slaves to operate simultaneously
DeepMentor Patented Automated AI IC Design
We automate the creation of circuit diagrams for AI models and their implementation on various FPGAs, significantly reducing the time and effort required to design AI IC chips.
DeepMentor’s exclusive automated technology offers “miniaturization” and “hardening” capabilities for multiple large-scale professional AI algorithms, tailored to meet customers’ specific functional requirements. This innovative process results in the creation of an FSM (DeepLogCore AI IP).
One key advantage of DeepMentor’s technology is its ability to eliminate the need for compilers and SDKs, avoiding the challenges related to the instruction set conversion difficulties and the risk of invalid circuits in chip design. Consequently, we are able to develop dedicated AI IP with a computing power utilization rate exceeding 90%, resulting in compact die areas and significant energy savings.
DeepMentor’s automated solution enables clients to easily and efficiently upgrade to next-generation AI solutions, ensuring faster time to market (within 3 months). The avoidance of software integration issues and concerns about labor shortages further simplifies the productization process for clients.
Market Segments
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Specifications
Key Features
1024
Up to 90%
Int-4 and Int-8
CNN, 3D CNN, transformer
Development Platform
Pytorch
Bare-metal, RTOS, Linux
Optimizer, Driver
Performance Model, Cycle Accurate Model, or FPGA Evaluations
Memory System
1~4 32/64-bit AXI
8MB to 64GB
Extended compression, layer/operator fusion
RISC-V Platform
RV64IMAFD
1-4 or more
JTAG/I2C/UART/SPI
AXI4/AXI4-Lite/AHB/APB